Cadence Design Systems, Inc. recently revealed that the Cadence digital full flow has been able to get certification for the Samsung Foundry 5nm Low-Power Early (5LPE) process with Extreme Ultraviolet (EUV) lithography technology.
The Cadence tools have received confirmation to meet Samsung Foundry’s technology requirements, that allows customers who make high-end products for the mobile, networking, server and automotive markets reach optimal power, performance and area (PPA).
The Cadence digital flow received certification by Samsung; using the Arm Cortex-A53 as well as Cortex-A57 cores for the 5LPE process. In a bid to ensure the Cadence flow is quite simple to use and understand, it inculcates a Cadence flow manager with a common user interface all through the total toolset. The Cadence tools perfected for the Samsung 5LPE process include the Genus Synthesis Solution, Joules RTL Power Solution, Innovus Implementation System, Conformal Equivalence Checking, Modus DFT Software Solution, Conformal Low Power, Quantus Extraction Solution, Voltus IC Power Integrity Solution, Tempus Timing Signoff Solution, Physical Verification System, Cadence CMP Predictor and Litho Physical Analyzer.
KT Moore, vice president, product management in the Digital & Signoff Group at Cadence revealed that via their current collaboration with Samsung Foundry, they are making it easier and faster for customers to make advanced-node designs in an age of increasing complexity. The strong combination of the Cadence digital implementation and signoff full-flow, Samsung 5LPE process, and Arm cores provides customers with access to the most recent technologies to perfect PPA and create innovations for the future.
The integrated Cadence digital full-flow supplies a quick way to fashion closure and make predictability better. It supports the company’s overall Intelligent System Design strategy, thus allowing advanced-node system-on-chip (SoC) design excellence.